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Cryptanalysis of the Full AES Using GPU-Like Special-Purpose Hardware
AES Cryptanalysis Cryptanalytic Hardware
2012/6/14
The block cipher Rijndael has undergone more than ten years of extensive cryptanalysis since its submission as a candidate for the Advanced Encryption Standard (AES) in April 1998. To date, most of th...
Cryptanalysis of the Full AES Using GPU-Like Special-Purpose Hardware
secret-key cryptography / AES Cryptanalysis Cryptanalytic Hardware
2012/3/20
The block cipher Rijndael has undergone more than ten years of extensive cryptanalysis since its submission as a candidate for the Advanced Encryption Standard (AES) in April 1998. To date, most of th...
We consider general program obfuscation mechanisms using ``somewhat trusted'' hardware devices, with the goal of minimizing the usage of the hardware, its complexity, and the required trust. Specifica...
Basing Obfuscation on Simple Tamper-Proof Hardware Assumptions
Obfuscation Stateless Tamper-Proof hardware Universal Composability Universal Arguments Fully-Homomorphic-Encryption
2012/3/20
Code obfuscation is one of the most powerful concepts in cryptography. It could yield functional encryption, digital rights management, and maybe even secure cloud computing. However, general code obf...
Static Fault Attacks on Hardware DES Registers
Hardware DES fault attacks safe-error register attacks
2012/3/26
In the late nineties, Eli Biham and Adi Shamir published the first paper on Differential Fault Analysis on symmetric key algorithms. More specifically they introduced a fault model where a key bit loc...
An Experimentally Verified Attack on Full Grain-128 Using Dedicated Reconfigurable Hardware
secret-key cryptography / Grain-128 stream cipher cryptanalysis cube attacks cube testers RIVYERA experimental verification
2012/3/28
In this paper we describe the first single-key attack which can break the full version of Grain-128 for arbitrary keys by an algorithm which is considerably faster than exhaustive search (by a factor ...
On Co-Optimization Of Constrained Satisfiability Problems For Hardware Software Applications
Applied sciences Constrained satisfiability Hardware Software Co-optimization Transistors
2014/11/7
Manufacturing technology has permitted an exponential growth in transistor count and density. However, making efficient use of the available transistors in the design has become exceedingly difficult....
Cryptanalysis of the Full AES Using GPU-Like Special-Purpose Hardware
AES Cryptanalysis Cryptanalytic Hardware
2012/8/28
The block cipher Rijndael has undergone more than ten years of extensive cryptanalysis since its submission as a candidate for the Advanced Encryption Standard (AES) in April 1998. To date, most of th...
Basing Obfuscation on Simple Tamper-Proof Hardware Assumptions
Obfuscation Stateless Tamper-Proof hardware
2012/8/28
Code obfuscation is one of the most powerful concepts in cryptography. It could yield functional encryption, digital rights management, and maybe even secure cloud computing. However, general code obf...
A HARDWARE-EFFICIENT ARCHITECTURE FOR MULTI-RESOLUTION MOTION ESTIMATION USING FULLY RECONFIGURABLE PROCESSING ELEMENT ARRAY
architecture re-configurable multiresolution motion estimation video coding
2013/7/24
Integer motion estimation (IME) for block-based video coding presents a significant challenge in external memory bandwidth, data latency, and circuit area with the increase of coding complexity and vi...
An Experimentally Verified Attack on Full Grain-128 Using Dedicated Reconfigurable Hardware
Grain-128 stream cipher cryptanalysis cube attacks cube testers RIVYERA experimental verification
2011/6/9
In this paper we describe the first single-key attack which can break the full version of Grain-128 for arbitrary keys by an algorithm which is considerably faster than exhaustive search (by a factor ...
Hardware Requirements for Optical Circuit Switched Data Center Networks
Optical interconnects Switching Networks circuit-switched
2015/5/22
Based on measurements of a prototype, we identify hardware requirements for improving the performance of hybrid electrical-packet-switched/optical-circuit-switched data center networks.
A Low-Area Unified Hardware Architecture for the AES and the Cryptographic Hash Function ECHO
implementation / AES ECHO hash functions implementation SHA-3
2012/3/29
We propose a compact coprocessor for the AES (encryption, decryption, and key expansion) and the cryptographic hash function ECHO on Virtex-$5$ and Virtex-$6$ FPGAs. Our architecture is built around a...
Optical Network Design Algorithms that Consider Optical Path Add/Drop Ratio Restrictions for OXC Hardware Scale Reduction
Optical Network Design Algorithms Hardware Scale Add/Drop Ratio
2015/5/18
We develop network design algorithms that consider constraints on the number of added/dropped optical paths at nodes in terms of wavelength and of fiber. The strategy is demonstrated to significantly ...
AERIAL SURVEYING UAV BASED ON OPEN-SOURCE HARDWARE AND SOFTWARE
UAVs Photogrammetry Robotics IMU Mapping
2014/5/9
In the last years the functionality and type of UAV-systems increased fast, but unfortunately these systems are hardly available for
researchers in some cases. A simple and low-cost solution was dev...